Reducing power consumption of integrated circuits and systems continues to be a difficult but necessary task particularly for integrated circuits used in mobile devices such as laptop devices, handheld devices and other mobile and non-mobile devices. In addition, reducing power consumption related to communication links can be critical since communication links may consume large amounts of power during active modes. One communication link proposed by the PCI SIG to augment and possibly replace several buses for high performance interconnect is referred to as PCI Express™. This proposed link consists of one or more lanes, each lane being capable of bi-directional communication. A single lane is composed of two sets of differential serial communication pairs. A single differential serial communication pair is required for transmission of information in a single direction, thus two pairs provide for bidirectional transmission capability. Communication in this scheme is accomplished by means of the transmission of packets across lane(s). Each packet contains clock information and possibly data. In all cases clock information is transmitted in a continuous stream of packets in both directions within each bidirectional lane. The continuous transmission of packets with embedded clock information can consume significant amounts of power.
Each differential serial communication pair consists of for example two, low voltage, differentially driven pairs of signals: a transmit pair and a receive pair. Data is embedded in an encoding scheme and organized into packets to achieve high data rates. The bandwidth of the differential serial communication link may be linearly scaled by adding lanes. For example, an implementation may support x1, x2, x4, x8, x12, x16 and x32 lane widths and splits the data across the lanes as desired. During initialization (such as power-up), each PCI Express™ link is set up following negotiation of the link width and frequency of operation by two agents at each end of the link. No firmware or operating system needs to be used. The selection of the link width however is typically performed during a power on condition, a reset condition or link fault condition through the use of a link training and status state machine (LTSSM).
In addition, power savings is employed after the link width is defined during initialization, such that lower power may be used depending upon the power setting of the links. For example, during active link (e.g. normal) operation, a transmitter's power may be changed to multiple different power levels (which are designated L0, L1, etc.). As such, once the link width has been determined after initialization, the link width stays the same but different power states may be used. L0, which may be for example an 80 milliwatt mode per lane, L0s which may be for example a 20 milliwatt mode per lane, L1, which may be a 5 milliwatt mode per lane and L2 or L3 which may be a mode that may consume less than 1 milliwatt of power per lane. Depending upon the power state level, it may take more time for the links to become active or increase the power states depending upon the electrical circuitry that is shut off during these power modes. In all events however, the power modes are normal states within a set constant link width. This does not preclude additional desirable power savings.
For example, during normal operation the links that have been previously designated as active may change power states to save power by turning off for example the circuitry involved in the transmitting of communication on either side of the link. However, although this results in a power savings, the link width is kept the same until for example a system is turned off and powered up, reset or if there is a link failure. As such, additional power savings would be desirable.
FIG. 1 illustrates a state diagram illustrating, for example, the states of the link training and status state machine that is used during a power-up condition to initially negotiate the link width between two ends of the links. As noted above, this operation is performed during non-normal operating conditions (e.g. non-active link condition) such as during power on or if there is a link fault recovery requirement or if a reset occurs. The detect state is typically entered during the power on state or other non-active or normal states. During the detect state for example the state machine on one or both sides of the link detects the number of lanes that are connected.
During the detect state, a receiver detection sequence is performed to see how wide the link width can be. For example, data is communicated to determine the number of lanes available or the maximum number of lanes available on either side of the link. A polling state is used to send training sets to stabilize receivers. In the configuration state, a link width negotiation is performed to negotiate the number of lanes that are to be used. For example, if one end of the link can accommodate eight lanes but another end of a link can accommodate sixteen, the maximum link width would be eight lanes. In the L0 state, electrical idle conditions are used to, for example, enter different power states for lanes that have been selected as active during the configuration state. To come out of a power saving state (e.g., L1 to L0), a recovery state is entered which includes, for example, sending training set information between the elements at the ends of the link to retrain the link, and to re-enter L0.
Also, to initially determine the number of lanes or the link width during power on, reset or other inactive operation condition, the detect state and other states in the transitions between these states must be carried out. To change the link width, a recovery state is entered which transitions to a configuration state which then transitions to the detect state. Then training at the new link width commences. For example, it may take at least 64 microseconds or as long as 12 milliseconds to go from the detect state to the L0 state. In addition, as noted above the link width determination is only performed during non-active modes. Moreover, the link can become unstable because a link down state is entered so that accesses on the link are discarded.
Accordingly, a need exists for a method and apparatus to further reduce power consumption in connection with a differential serial communication link.